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AI Accelerator Time Calculator

A matrix multiply (GEMM) time estimator for the Majestic AI accelerator server running at 1 GHz, with BF16 and FP8 support.

Available as an interactive HTML dashboard and a Python CLI/library.

Files

File	Description
`accelerator_calculator.html`	Interactive browser dashboard
`accelerator_calculator.py`	Python port — CLI + importable library
`calculator_tests.html`	Browser-based unit tests

Hardware Architecture

CORE → MIND → HEX → majestic_tile → AIU → SERVER

Level	Count (per parent)	SRAM	Notes
CORE	4 per MIND	—	Atomic compute unit
MIND	4 per HEX	—	Holds 2 tiles (2A + 2B + 2C)
HEX	12 per majestic_tile	12 MB	4 MINDs × 2 tiles = 8 tiles
majestic_tile	4 per AIU	144 MB HEX + 48 MB SXM	48 MINDs · 192 COREs
AIU	12 per server	576 MB HEX + 192 MB SXM	192 MINDs · 768 COREs
SERVER	—	6,912 MB HEX + 2,304 MB SXM	2,304 MINDs · 9,216 COREs

Memory Layout per Tile

For a GEMM A[M×K] × B[K×N] = C[M×N] tiled with tile_m × tile_n:

Buffer	Formula	Type
A tile	`tile_m × K × bytes_per_elem`	BF16 (2 B) or FP8 (1 B)
B tile	`tile_N × K × bytes_per_elem`	BF16 (2 B) or FP8 (1 B)
C tile	`tile_m × tile_N × 4`	FP32 accumulator

Hierarchy

Per tile:   A  +  B  +  C
Per MIND:   2A +  2B +  2C       (TILES_PER_MIND = 2)
Per HEX:    8A +  8B +  8C       (4 MINDs × 2 tiles = 8 tiles, must fit in 12 MB)

HTML Dashboard

Open accelerator_calculator.html in any modern browser — no server required.

Inputs:

Matrix dimensions: M, K, N
Tile sizes: tile_m, tile_n (multiples of 128)
Data types: BF16 or FP8 for A and B independently
Available AIUs: 1–12

Outputs:

Total MACs and MACs/cycle
Compute time, BW time, total time per pass and overall
Speedup vs serial baseline
Memory fit table (per tile → per MIND → per HEX vs 12 MB SRAM)
AIU assignment map with fill-first allocation visualization
MACs/cycle vs K performance chart

Python

Requirements

Python 3.8+ — standard library only (no dependencies).

Run as CLI

# defaults: M=K=N=256, tile=256x256, BF16/BF16, 12 AIUs
python3 accelerator_calculator.py

# custom configuration
python3 accelerator_calculator.py \
    --M 4096 --K 4096 --N 4096 \
    --tile_m 256 --tile_n 256 \
    --type_a BF16 --type_b FP8 \
    --avail_aius 8

All CLI options

Argument	Default	Description
`--M`	256	Rows of A
`--K`	256	Inner dimension
`--N`	256	Cols of B
`--tile_m`	256	Tile height
`--tile_n`	256	Tile width
`--type_a`	BF16	A matrix type (`BF16` or `FP8`)
`--type_b`	BF16	B matrix type (`BF16` or `FP8`)
`--avail_aius`	12	AIUs allocated to this task

Import as library

from accelerator_calculator import compute, print_results

# run computation
r = compute(M=1024, K=2048, N=1024, tile_m=256, tile_n=256,
            type_a='BF16', type_b='FP8', avail_aius=12)

# pretty-print
print_results(r)

# access individual values
print(r['ns_total'])        # total time in nanoseconds
print(r['hex_total'])       # total HEX memory required in bytes
print(r['n_passes'])        # number of server passes
print(r['speedup'])         # speedup vs serial

Key functions

Function	Description
`bytes_per_elem(dtype)`	BF16→2, FP8→1
`get_macs_per_cycle(K, dtype)`	Interpolated MACs/cycle from benchmark table
`tile_a_mem(tile_m, K, type_a)`	A tile size in bytes
`tile_b_mem(tile_n, K, type_b)`	B tile size in bytes
`tile_c_mem(tile_m, tile_n)`	C tile size in bytes (FP32)
`mind_mem_total(...)`	Total memory per MIND (2 tiles: 2A+2B+2C)
`hex_mem_total(...)`	Total memory per HEX (8 tiles) vs 12 MB SRAM
`compute(M, K, N, ...)`	Full estimation — returns result dict
`print_results(r)`	Pretty-print all results to stdout

Unit Tests

Open calculator_tests.html in a browser to run all tests.

Tests cover:

Hardware constant derivations (48 HEXes/AIU, 192 MINDs/AIU, 2304 device slots)
bytes_per_elem for BF16 and FP8
Per-tile memory: A, B, C formulas for multiple shapes and types
Per-MIND memory: 2A + 2B + 2C totals for BF16, FP8, and mixed
Per-HEX memory: 8-tile totals, fit/overflow vs 12 MB, equality with 4 × MIND
Scheduling: pass count for various tile/slot combinations
Hierarchy consistency: HEX = 4 × MIND, mindTotal = sum of parts

Scheduling Model

Tiles are assigned to MINDs using fill-first locality:

fill 4 MINDs per HEX → fill 12 HEXes per majestic_tile → fill 4 majestic_tiles per AIU

Each MIND processes exactly 1 output tile per pass
Server passes = ceil(total_output_tiles / effective_MIND_slots)
Effective slots = avail_AIUs × 192 (192 MINDs per AIU)

Performance Model

Parameter	Value
Clock	1 GHz
Memory bandwidth	256 GB/s
Compute type	FP8 if either A or B is FP8, else BF16
Timing model	compute + BW, no overlap (pessimistic)

MACs/cycle is interpolated from an empirical benchmark table measured at M=N=256 with K ranging 64–7872.